The present invention relates to distributed memory multiprocessor architectures and, more particularly, to methods and devices for improving coding and memory referencing efficiency in distributed memory multiprocessor architectures.
Time critical data processing functions are often performed in multiprocessor architectures. Multiprocessor architectures provide superior processing speeds relative to single processor architectures by executing multiple operating system tasks concurrently. Concurrently-executing tasks, however, generally create the need to track some variables on a "per processor" basis. For example, when different processors are running different tasks concurrently, it is often necessary to simultaneously monitor which task is currently being performed by each processor. Contemporaneous monitoring has conventionally been achieved by declaring in the operating system a global variable array having the form x [NCPU-1], wherein NCPU is the number of processors supported in the multiprocessor architecture and each processor is assigned a different integer in the range zero to NCPU-1 for tracking its instance of x.
The use of global variable arrays in the form x [NCPU-1] has created complications. First, in distributed memory multiprocessor architectures, standard compilers usually assign all NCPU instances of x to contiguous addresses in a single processor's local memory. While the other processors can access their respective instances of x by referencing the remote processor's memory, the latency associated with such non-local memory referencing is often considerable. To retrieve data from a non-local memory, routing assistance of a global memory controller (GMC) shared among the processors is usually required. Such assistance typically involves resolving a global physical address (GPA) supplied by the referencing processor to the non-local memory supporting that address and routing the address accordingly. Because the GMC is a shared resource, routing assistance is often delayed while addresses previously submitted are resolved and routed. Additional time is spent routing the address once access to the GMC is secured.
A second complication arises if the multiprocessor operating system is derived from a single processor operating system. It is often the case that an operating system for a multiprocessor architecture is derived from an operating system originally designed for a single processor architecture. In that event, each single instance coded variable in the form x which will require "per processor" monitoring in the multiprocessor architecture must be recoded into the form x [NCPU-1]. Such recoding may consume considerable programming man-hours.
Accordingly, there is a need for greater localization of memory referencing in distributed memory multiprocessor architectures, particularly for variables requiring tracking on a "per processor" basis. There is also a need for a means for adapting single processor operating systems into multiprocessor operating systems without substantial recoding.